|FROM ||Ruben Safir
|SUBJECT ||Subject: [LIU Comp Sci] Memory Cache theory Architecture Class
|From owner-learn-outgoing-at-mrbrklyn.com Sat Nov 29 20:18:16 2014
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Date: Sat, 29 Nov 2014 20:19:08 -0500
From: Ruben Safir
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Subject: [LIU Comp Sci] Memory Cache theory Architecture Class
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I am so behind on this class. I got disgusted when the memory caching
notes made no sense and since then I was overwhelmed with the database
class and the arch presentation.
I'm just getting back to the now. Did anyone come up with a reasonable
approach to the second part of the HW problem having to do with LRU?
so I'd researched the memory caching problems and I'm come up with a
number of decent sources for more enlighten discussion of the set up.
It seems that nobody puts this together well. There is usually some
small part that is missed, maybe because of the complexity. But here
is an EXCELLENT video and Notes for Cache and Direct Through Cash from
the University of Berkeley that you should check out.
You might notice the point in the second video where the female student
digs on him about the meaning of the offset, and is a common area of
misidentification of exact meaning. It is a problem when trying to learn
this and answer HW questions.
He has excellent notes that cover this material which is most excellent.
I might copy these links and move them to the NYLXS website just so they don't vanish.
Additionally, this video from MIT is EXCELLENT on I/O model theory (such as direct cache)
is a must view if your are at all serious about Comp Sci and this topic. It is looking at
the algorithms for caching and how different models affect problem solving,
Also there are excellent Indian videos on this if you put aside and cultural biases.
I love the white board!!
It means you have to actually understand the material.
and finally, check out this only somewhat related area from Carniegie Mellon
This is pretty cool and makes you wish to learn more....